Hireroo Ltd
18 offers today in Spain. Each links to the page it lives on.
See them all in the searchThe newest
- FPGA Engineer - Mid
- Lead High-Speed Verification Engineer – PCIe/UCIe
- Performance Modelling Engineer - Mid
- Synthesis & STA Lead Engineer - Hybrid Barcelona
- DFT Engineer - Mid
- Performance Modelling Engineer - Hybrid (Barcelona)
- Hybrid FPGA Engineer - Mid Level, Flexible Hours & Perks
- Senior Verification Engineer, LSU and Data Cache
- Mid/Senior Software Engineer - AI Frameworks & Hardware
- Mid DFT Engineer – Hybrid Barcelona, Test & Yield
- DDR Design Engineer
- Senior AI Engineer - Hardware-Optimized ML Architect Hybrid
- STA & Synthesis Lead Engineer
- Senior Verification Engineer - Memory Subsystem & Cache
- Software Engineer, AI Frameworks, Mid / Senior
- Lead Design Verification Engineer, High Speed Interface Protocols
- Senior DDR/HBM Memory Subsystem Engineer – Hybrid
- AI Engineer - Mid / Senior